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schematics:apu_pinout

Pins 1 - 4 control the address. Here is the encoding scheme, with Pin 4 being most significant bit.

2140 = 0010 2141 = 0110 2142 = 1010 2143 = 1110

Pin 1 is PA7 - Pull this one Low Pin 2 is PA6 - Pull this one High Pin 3 is PA0 Pin 4 is PA1

Pin 5 is /WR Pin 6 is /RD

Pins 7-14 is D0-7

Pin 15 is /RESET Pin 16 is Not Connected

Pin 17 is SMPCK - output clock pulse, frequency unknown. Pin 18 is Vcc Pin 19 is GND Pin 20 is Mute Pin 21 is Audio output Pin 22 is Audio output Pin 23 is GND Pin 24 is Audio Vcc

Credits:

The Dumper - Info on Pins 17 and 20.

EDIT: Pin 20 Mute does not need to be pulled high for audio output.

schematics/apu_pinout.txt · Last modified: 2019/08/27 20:45 by 127.0.0.1